Fig.10-1 Contents of EDX after RESET

Figure 10-1. Contents of EDX after RESET EDX REGISTER 31 23 15 7 0 +----------------+----------------+----------------+----------------+ | | DH | DL | | UNDEFINED | DEVICE ID | STEPPING ID | | | 3 | (UNIQUE) | +----------------+----------------+----------------+----------------+

Fig.10-2 Initial Contents of CR0

Figure 10-2. Initial Contents of CR0 CONTROL REGISTER ZERO 31 23 15 7 4 3 1 0 +-----------------+-----------------+-------------------+---------------+ |P| |E|T|E|M|P| | | UNDEFINED | | | | | | |G| |T|S|M|P|E| +-----------------+-----------------+-------------------+---------------+ | | | | | | +-------------0 - PAGING DISABLED | | | | | * - INDICATES PRESENCE OF 80387-----------------+ | | | | 0 - NO TASK SWITCH--------------------------------+ | | | 0 - DO NOT MONITOR COPROCESSOR----------------------+ | | 0 - COPROCESSOR NOT PRESENT---------------------------+ | 0 - PROTECTION NOT ENABLED (REAL ADDRESS MODE)----------+

Fig.10-3 TLB Structure

Figure 10-3. TLB Structure +----------------------------------+ 7| TAG | DATA | |-----------------+----------------| . . . +------- . . . | SET 11 . . . | +-- |-----------------+----------------| | | 1| TAG | DATA | | | |-----------------+----------------| | | 0| TAG | DATA | | | +----------------------------------+ | | | | +----------------------------------+ | | 7| TAG | DATA | | | |-----------------+----------------| | | . . . | +-- . . . | SET 10 . . . | +-- |-----------------+----------------| | | 1| TAG | DATA | | D | | | |-----------------+----------------| | A | | | 0| TAG | DATA | | T +------+ | +----------------------------------+ | A | | +------+ | +----------------------------------+ | B | | | 7| TAG | DATA | | U | | | |-----------------+----------------| | S | | | . . . | +-- . . . | SET 01 . . . | +-- |-----------------+----------------| | | 1| TAG | DATA | | | |-----------------+----------------| | | 0| TAG | DATA | | | +----------------------------------+ | | | | +----------------------------------+ | | 7| TAG | DATA | | | |-----------------+----------------| | | . . . | +-- . . . | SET 00 . . . +------- |-----------------+----------------| 1| TAG | DATA | |-----------------+----------------| 0| TAG | DATA | +----------------------------------+ See Also:
10.6.1

Fig.10-4 Test Registers

Figure 10-4. Test Registers 31 23 15 11 7 6 5 4 3 2 1 0 +-----------------+---------------+----+-------+---------------+ | | |H| | | | PHYSICAL ADDRESS |0 0 0 0 0 0 0| |REP|0 0| TR7 | | |T| | | |--------------------------------------+-------------+---------| | | | |D| |U| |W| | | | LINEAR ADDRESS |V|D| |U| | | |0 0 0 0|C| TR8 | | | |#| |#| |#| | | +-----------------+---------------+----+-------+---------------+ NOTE: 0 INDICATES INTEL RESERVED. NO NOT DEFINE