Fig.4-1 Systems Flags of EFLAGS Register

Figure 4-1. System Flags of EFLAGS Register 31 23 15 7 0 +---------------+----------------+----------------+--------------+ | |V|R| |N|I/O |O|D|I|T|S|Z| |A| |P| |C| |0 0 0 0 0 0 0 0 0 0 0 0 0 0| | |0| | | | | | | | |0| |0| |1| | | |M|F| |T| PL |F|F|F|F|F|F| |F| |F| |F| +---------------+----------------+----------------+--------------+ | | | | | VIRTUAL 8086 MODE----+ | | | | RESUME FLAG------+ | | | NESTED TASK FLAG----------+ | | I/O PRIVILEGE LEVEL-------------+ | INTERRUPT ENABLE---------------------+ ---------------------------------------------------------------------------- NOTE 0 OR 1 INDICATES INTEL RESERVED. DO NOT DEFINE. ----------------------------------------------------------------------------

Fig.4-2 Control Registers

Figure 4-2. Control Registers 31 23 15 7 0 +-----------------+-----------------+-----------------+-----------------+ | | | | PAGE DIRECTORY BASE REGISTER (PDBR) | RESERVED |CR3 |-----------------------------------------------------------------------| | | | PAGE FAULT LINEAR ADDRESS |CR2 |-----------------------------------------------------------------------| | | | RESERVED |CR1 |-----------------------------------------------------------------------| |P| |E|T|E|M|P| |G| RESERVED |T|S|M|P|E|CR0 +-----------------+-----------------+-----------------+-----------------+